Tag: xilinx

FPGA

Xilinx Vitis `Can’t read “map”: no such variable` 문제 해결

Post author By 참치
Post date 2023-08-13
No Comments on Xilinx Vitis `Can’t read “map”: no such variable` 문제 해결

Xilinx Vitis v2022.2 (64-bit) 에서 디버깅을 시도할때 발생되는 이슈입니다. 필자의 […]

Tags bug, fpga, vitis, xilinx

FPGA Uncategorized

Xilinx Vitis 빌드시 sin, cos, tan 함수 오류 해결책

Post author By 참치
Post date 2023-05-16
No Comments on Xilinx Vitis 빌드시 sin, cos, tan 함수 오류 해결책

Xilinx Vitis v2020.2.0 (64-bit) 에서 ARM 프로젝트를 생성하고 빌드를 수행할 […]

Tags arm, vitis, xilinx

KHY on 행 방 분 명2026-03-06
고토드립니다
참치 on 테슬라코일의 용도 및 기타 설명2026-03-06
상호 유도도 있지만, 궁극적으로 둘이 공진해서 전압을 뻥튀기 시키는 느낌이라고 보시면 됩니다
2025-01-24 on 테슬라코일의 용도 및 기타 설명2025-01-24
L3에서 L4로 전자기유도 현상이 일어나는 것을 물2에서 배우는 상호유도 개념으로 설명해도 문제가 없을까요?
참치 on 오픈소스 YOURLS 을 이용한 단축 URL(짧은주소) 만들기2023-11-17
https://yourls.org/docs/guide/install https://yourls.org/docs/guide/server-configuration Yourls에서 공식적으로 제공하고 있는 설치와 서버 설정 가이드입니다. 참고 해보시기 바랍니다.
참치 on 오픈소스 YOURLS 을 이용한 단축 URL(짧은주소) 만들기2023-11-17
권한 문제가 있는것 같습니다. 일반적인 웹 호스팅에서도 정상적으로 잘 설치됩니다. 500에러는 보통 서버 설정이나 스크립트(소스코드)에 문제가 있을때 발생됩니다.

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